Power analysis security evaluation on Piccolo based on FPGA platform

被引：0
|
作者：
Wang, Chen-Xu [1 ,2 ]
Li, Jing-Hu [2 ]
Yu, Ming-Yan [1 ,2 ]
Wang, Jin-Xiang [1 ]
机构：
[1] Microelectronics Center, Harbin Institute of Technology, Harbin 150001, China
[2] Microelectronics Center, Harbin Institute of Technology, Weihai 264209, China
来源：
Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology | 2014年 / 36卷 / 01期
关键词：
To evaluate Piccolo's security against Power Analysis Attack (PAA); a cipher text attack model is proposed and Correlation Power Analysis (CPA) is conducted on this cipher implementation with measured power traces based on Side-channel Attack Standard Evaluation Board (SASEBO). Due to the whiten keys for the final round of Piccolo; attacked keys including RK24L; RK24R; WK2 and WK3 are divided into four sub-keys; which are disclosed one by one. This approach can reduce the 80-bit primary key search space from 280 to (2×220+2×212+216) and make it possible to recover the primary key. The attack results show that 3000 measured power traces are enough to recover Piccolo's 80-bit primary key; which proves the attack model's feasibility and Piccolo's vulnerability to CPA against its hardware implementation. So; some countermeasures should be used for Piccolo's hardware implementation;
D O I：
10.3724/SP.J.1146.2013.00193
中图分类号：
学科分类号：
摘要：
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页码：101 / 107
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