A correlation power analysis resistant DES algorithm and its circuit implementation on FPGA

被引：0
|
作者：
National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China [1 ]
机构：
来源：
Dongnan Daxue Xuebao | 2012年 / 6卷 / 1063-1068期
关键词：
D O I：
10.3969/j.issn.1001-0505.2012.06.008
中图分类号：
学科分类号：
摘要：
Side channel attack
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