Novel universal all-digital clock smoothness technique

As PLLs have some disadvantages such as the narrow synchronizing and pull-in ranges to smooth clocks with low-frequency large-amplitude jitter and wander, this paper presents a novel universal digital clock smoothness technique - the counting prognostication method. The key element of this technique is to use counting results in a cycle to prognosticate numbers in the next cycle. Principles and performance analyses are given to show that it can efficiently smooth jitter and wander, jitter accumulation is small, and the synchronizing and the pull-in range is very wide to smooth different frequencies. In addition, for applications in some special circumstances, the cycle varied counting prognostication method is also presented to diminish the capture time.