Harmonic-Invariant Scaling Method for Power Electronic Converters in Power Hardware-in-the-Loop Test Beds

Power hardware-in-the-loop (PHIL) is an experimental technique that uses power amplifiers and real-time simulators for studying the dynamics of power electronic converters and electrical grids. Power hardware-in-the-loop (PHIL) tests provide the means for functional validation of advanced control algorithms without the burden of building high-power prototypes during early technology readiness levels. However, replicating the behavior of high-power systems with laboratory scaled-down converters (SDCs) can be complex. Inaccurate scaling of the SDCs coupled with an exclusive focus on instantaneous voltages and currents at the fundamental frequency can lead to PHIL results that are only partially relatable to the high-power systems under study. Test beds that fail to represent switching frequency harmonics cannot be used for studying harmonic penetration or loss characterization of large-scale converters. To tackle this issue, this article proposes a harmonic-invariant scaling method that exploits the volt-ampere rating of preexisting laboratory SDCs for more accurately replicating harmonic phenomena in a PHIL test bench. First, a theoretical analysis of the proposed method is presented and, subsequently, the method is validated with MATLAB simulations and experimental tests. © 2020 IEEE.