Design of CMOS Based LC-Voltage Control Oscillator Using Substrate Bias Effect and Current Mirror Technique

被引:0
|
作者
Suresh, N. [1 ]
Kumar, S. Ashok [2 ]
Kamatham, Harikrishna [1 ]
机构
[1] AVN Inst Engn & Technol, Dept Elect & Commun Engn, Hyderabad, Telangana, India
[2] Rajalakshmi Inst Technol, Dept Elect & Commun Engn, Chennai, Tamil Nadu, India
关键词
Voltage control oscillator (VCO); Complementary metal oxide semiconductor (CMOS); Substrate-biasing; Current mirror; Phase noise; Figure of merit (FOM); VCO;
D O I
10.1007/s11277-024-11567-5
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
This paper proposed to design a CMOS based LC-voltage control oscillator using substrate bias effect and low-voltage folded-cascode current mirror circuit using an LC tank circuit at 2.5 GHz oscillation Frequency. The paper delves into the substrate-biasing technique, which adjusts the threshold voltage of a CMOS transistor, and the low-voltage folded-cascode current mirror circuit that utilizes CMOS technology to improve the performance of the current mirror circuit. The folded-cascode current mirror circuit comprises of a cascode structure in the input stage and a folded structure in the output stage, which is used to increase the output impedance and provide a more stable output current. The paper concludes that the folded-cascode current mirror circuit is a powerful tool in CMOS circuit design, offering improved performance and accuracy over the traditional current mirror circuit. In this simulation is carried out through cadence virtuoso generic process design kit (GPDK) with 90 nm technology. The simulation results exhibits phase noise of - 154.92 dBc/Hz @ 1 MHz, low power consumption of 4.8mW and the Figure of Merit - 216.09 dBc/Hz at 2.5 GHz oscillation frequency.
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页码:1351 / 1362
页数:12
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