GaN System-on-Chip: Pushing the Limits of Integration and Functionality

In this article, we present a futuristic perspective on GaN integrated circuit technology, discuss technical challenges that hinder leveraging the capabilities of the GaN process, and provide recommendations to push its limits of integration and functionality. We explore the limitations of current GaN processes at the process, circuit, and system levels, and present some potential developments to mitigate these limitations. The most recent progresses in GaN circuits has been inspired by the quest for higher performance, which has influenced innovations in circuit and system architectures. A promising solution is to pursue a functionality-oriented design paradigm in parallel with the traditional performance-oriented design approach. A review of state-of-the-art GaN transceivers indicates that most comprise merely a power amplifier (PA), a low-noise amplifier (LNA), and transmit-receive (T/R) switches. We propose three disruptive directions that potentially can reshape the future of highly integrated GaN systems, including a digital PA, an integrated sensing and communication (ISAC) transceiver, and GaN-CMOS chiplets in package, and investigate their prospects and challenges.