A Heterogeneous and Reconfigurable Decoder for the IEEE 1901 Standard

被引:0
|
作者
Chen, Yuxing [1 ]
Wang, Zhongfeng [1 ,2 ]
机构
[1] Nanjing Univ, Sch Elect Sci & Engn, Nanjing 210023, Peoples R China
[2] Sun Yat Sen Univ, Sch Integrated Circuits, Shenzhen 518107, Peoples R China
关键词
Decoding; Codes; Standards; Forward error correction; Convolutional codes; Complexity theory; Codecs; IEEE; 1901; low-density parity-check convolutional codes; heterogeneous scheme; reconfigurable design; LDPC; ARCHITECTURE; CODES;
D O I
10.1109/TCSI.2024.3439338
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The IEEE 1901 standard plays a crucial role in the extensive fields of smart grids, electric vehicles, and the Internet of Things. The forward error correction (FEC) codes specified in this standard include low-density parity-check convolutional codes (LDPC-CCs), Reed-Solomon (RS) codes, and RS convolutional concatenated (RSCC) codes. This work proposes a low-complexity decoder fully compliant with the standard. First, a heterogeneous scheme is introduced to LDPC-CC decoding. The new scheme assigns different data formats among processing elements (PEs), which reduces the overall storage size and enables a customized datapath down to the PE level. Then, to efficiently support diverse FEC demands in the standard, a reconfigurable architecture is thoroughly explored from both memory and datapath aspects. Leveraging these techniques, the first decoder compatible with the IEEE 1901 standard is developed and implemented with 55nm technology. Implementation results demonstrate that the proposed decoder satisfies the standard's requirements while exhibiting low hardware complexity.
引用
收藏
页码:4767 / 4777
页数:11
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