Design Space Exploration With Machine Learning Co-Optimization

被引:0
|
作者
Chuang, Quek Li [1 ]
Chong, Ang Boon [1 ]
Cheng, Lee Chia [1 ]
Ian, Koh Jid [1 ]
Farahanim, Nordin Nor [1 ]
Lok, Mei Ghee [1 ]
Hong, Phang Eng [1 ]
机构
[1] Intel, Bayan Lepas, Malaysia
关键词
EDA; machine learning; APR; physical design;
D O I
10.1109/ISIEA61920.2024.10607185
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In recent years, electronic design automation has been preoccupied with machine learning. The application of machine learning is being utilized by the design industry to increase the predictability of physical design and signoff. Presently, machine learning applications in the field of integrated circuit design are primarily concerned with yield modeling, lithography hotspot identification, noise and process variation modeling, analog circuit performance modeling, and implementation space exploration. This paper will share the idea of design space exploration with machine learning co-optimization for design development phase. The optimum tool app option for best performance during design development phase will be extracted and co-optimized with machine learning during RTL frozen phase. The proposed approach will preserved the previous machine and tool resources for the actual design deployment phase while achieving the optimum design performance. Hopefully, the sharing will benefit the community.
引用
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页数:4
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