Simultaneous optimization of cooling temperature difference and efficiency for multi-stage thermoelectric device

Cascaded multi-stage thermoelectric coolers (multi-TEC) have been proven to be an effective technology to achieve ultra-low temperature refrigeration. Although much theoretical research on multi-TEC has been carried out, how to fabricate a high-performance multi-TEC based on the reported thermoelectric materials is still not clear. In this work, we proposed a paradigm to design the geometry of a multi-TEC device to maximize the cooling efficiency (COP) and cooling temperature difference (AT) by aligning the current for the maximum COP of each stage. This design not only achieves the same AT compared with aligning the current for maximum Qc of each stage but also a great improvement of COP and power saving. The corresponding multi-TEC devices were also successfully fabricated, producing the high ATs of 108.6 K and 126.8 K for three- and four-stage devices, respectively, which deviate no more than 5% from the simulated results. Furthermore, the Bi2Te3-based fivestage device was predicted to achieve a ATmax of 146.3 K at 300 K by this methodology, which can be further increased to 161.5 K by the utilization of heterogeneous low-temperature thermoelectric materials, breaking through the high-record cooling temperature of multi-TEC. Therefore, this paradigm can be widely applied in the practical design and fabrication of multi-TEC.