FPGA Implementation of DNA Computing and Genetic Algorithm Based Image Encryption Technique

被引:0
|
作者
Rajashree, R. [1 ]
Durai, S. Ananiah [2 ]
机构
[1] VIT, SENSE, Chennai, India
[2] VIT, CNVD, Chennai, India
来源
BIOMEDICAL ENGINEERING SCIENCE AND TECHNOLOGY, ICBEST 2023 | 2024年 / 2003卷
关键词
DNA computation; Genetic Algorithm; Steganography; Image encryption; Binary data conversion; Elliptic Curve Cryptography; STEGANOGRAPHY;
D O I
10.1007/978-3-031-54547-4_32
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In the digital age, an increasing dependency of humans on digital technologies is much prevalent. A high demand in securing the private and confidential data is essential, which would otherwise lead to mishandling and misuse of personal information for ulterior motives. To avoid such vulnerabilities many Cryptographic and stenographic techniques were developed over the past decades. Though such existing schemes provided satisfactory shielding, high computational cost, increased processing time, low embedding capacity, and low imperceptibility, renders it as unsuitable for applications requiring high security and high speed such as medical data security. A hybrid DNA computing technology combined with a genetic algorithm is developed in this work to cater for medical image encryption, which will address the aforementioned limitations. The suggested approach converts plaintext information into binary by first mapping it to the DNA sequence. The binary information is then embedded in the cover image using genetic algorithm to yield a stego image. Elliptic Curve Cryptographic hardware (ECC) encrypts the generated stego image, providing a more secure means of storage/communication. The suggested hardware system is implemented in the Zynq 7000 FPGA device, which occupied a comparatively low overall LUT and DSP slices of around 5796 and 19 respectively.
引用
收藏
页码:418 / 432
页数:15
相关论文
共 50 条
  • [31] Parallel chaos-based image encryption algorithm: high-level synthesis and FPGA implementation
    Sharifian, M. M. Saeed
    Rashtchi, Vahid
    Azarpeyvand, Ali
    JOURNAL OF SUPERCOMPUTING, 2024, 80 (08): : 10985 - 11013
  • [32] FPGA implementation of a reconfigurable image encryption system
    Ramirez-Torres, M. T.
    Murguia, J. S.
    Mejia-Carlos, M.
    2014 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2014,
  • [33] FPGA implementation(s) of a scalable encryption algorithm
    Mace, F.
    Standaert, F. -X.
    Quisquater, J. -J.
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (02) : 212 - 216
  • [34] FPGA Implementation of Advanced Encryption Standard Algorithm
    Kouser, Zabina
    Singhal, Manish
    Joshi, Amit M.
    2016 INTERNATIONAL CONFERENCE ON RECENT ADVANCES AND INNOVATIONS IN ENGINEERING (ICRAIE), 2016,
  • [35] FPGA Implementation of Authenticated Encryption Algorithm Minalpher
    Kosug, Makiko
    Yasuda, Masahiro
    Satoh, Akashi
    2015 IEEE 4TH GLOBAL CONFERENCE ON CONSUMER ELECTRONICS (GCCE), 2015, : 572 - 576
  • [36] A Novel Image Encryption Algorithm Based on a Fractional-Order Hyperchaotic System and DNA Computing
    Li, Taiyong
    Yang, Minggao
    Wu, Jiang
    Jing, Xin
    COMPLEXITY, 2017,
  • [37] A DNA-based implementation of YAEA encryption algorithm
    Amin, Sherif T.
    Saeb, Magdy
    El-Gindi, Salah
    PROCEEDINGS OF THE SECOND IASTED INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE, 2006, : 116 - +
  • [38] Chaos-based image encryption using a hybrid genetic algorithm and a DNA sequence
    Enayatifar, Rasul
    Abdullah, Abdul Hanan
    Isnin, Ismail Fauzi
    OPTICS AND LASERS IN ENGINEERING, 2014, 56 : 83 - 93
  • [39] FPGA Implementation of Hybrid Linear Cellular Automata based Encryption Algorithm
    Gangadari, Bhoopal Rao
    Ahamed, Shaik Rafi
    2017 INTERNATIONAL CONFERENCE ON COMMUNICATION AND SIGNAL PROCESSING (ICCSP), 2017, : 281 - 285
  • [40] FPGA based Hardware Implementation of Hybrid Cryptographic Algorithm for Encryption and Decryption
    Shende, Vikrant
    Kulkarni, Meghana
    2017 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, COMMUNICATION, COMPUTER, AND OPTIMIZATION TECHNIQUES (ICEECCOT), 2017, : 416 - 419