High accuracy OPC electromagnetic full-chip modeling for curvilinear mask OPC and ILT

One of the key methods targeted for continuing the resolution scaling in new device technology nodes is the trend towards using curvilinear mask patterns. With recent advances in multi-beam mask patterning and large-scale adoption of ILT mask data correction [1], curvilinear (and all-angle) mask patterns are considered today as a mainstream technology option [2]. Curvilinear mask patterns provide improved wafer resolution and OPC/ILT mask correction control with reduced mask manufacturing issues related to tight corners and line-ends [3]. However, OPC, ILT, LRC and other full-chip simulation-based mask synthesis methods also require more accurate electromagnetic (i.e., M3D) simulation for new technology nodes. Prior full-chip electromagnetic simulation methods have often assumed that mask patterns are restricted to Manhattan geometries or utilize limited angles. Therefore, there is a general industry need for improved electromagnetic full-chip simulation methods for curvilinear mask patterns. This paper will present a new electromagnetic full-chip simulation method for curvilinear mask patterns that will improve the accuracy of mask synthesis methods at upcoming technology nodes. This method can provide both accuracy and speed benefits on mask synthesis with curvilinear mask patterns for both DUV and EUV lithography. The method utilizes an enhanced physics-based treatment of electromagnetic mask scattering both tuned and verified by rigorous electromagnetic Maxwell's equation solvers.