Multiple Adjacent Bit Error Detection and Correction Codes for Reliable Memories: A Review

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作者
Neelima, K. [1 ]
Subhas, C. [2 ]
机构
[1] Department of ECE, JNTUA, Anantapuramu,515002, India
[2] Professor and Head of ECE Department, Vice-Principal, JNTUA College of Engineering, Kalikiri,517234, India
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Compilation and indexing terms; Copyright 2024 Elsevier Inc;
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摘要
Critical component - Decoding process - Erroneous datum - Error detecting and correcting codes - Error detection and correction codes - Error masking - Multiple bit upset - Review papers
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页码:357 / 371
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