INTRINSIC JITTER OF POSITIVE ZERO NEGATIVE JUSTIFICATION SYSTEMS USING DIGITAL CLOCK RECOVERY

被引:0
|
作者
KUHNE, F
KAMP, N
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:352 / 356
页数:5
相关论文
共 50 条
  • [1] Simulating clock jitter in digital communication systems
    Makhija, MG
    Telang, VP
    1996 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS - CONVERGING TECHNOLOGIES FOR TOMORROW'S APPLICATIONS, VOLS. 1-3, 1996, : 716 - 720
  • [2] 1/f noise and clock jitter in digital electronic systems
    Forbes, L
    Zhang, CW
    NOISE IN DEVICES AND CIRCUITS, 2003, 5113 : 168 - 178
  • [3] Almost Zero-Jitter Optical Clock Recovery Using All-Optical Kerr Shutter Switching Techniques
    Damani, Rasoul
    Salehi, Jawad A.
    JOURNAL OF LIGHTWAVE TECHNOLOGY, 2015, 33 (09) : 1737 - 1747
  • [4] Analyses of jitter suppression for digital transmission system with filter-less clock recovery
    Tanaka, N
    Yoshida, H
    Takahashi, M
    Takasaki, Y
    2003 INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY, VOL 1 AND 2, PROCEEDINGS, 2003, : 582 - 585
  • [5] POSITIVE ZERO NEGATIVE JUSTIFICATION TECHNIQUE FOR MULTIPLEX TRANSMISSION OF PLESIOCHRONOUS DATA SIGNALS
    KUHNE, F
    LANG, K
    FREQUENZ, 1978, 32 (10) : 281 - 287
  • [6] DESIGN AND ANALYSIS OF A JITTER-FREE CLOCK RECOVERY SCHEME FOR QAM SYSTEMS
    DANDREA, NA
    LUISE, M
    IEEE TRANSACTIONS ON COMMUNICATIONS, 1993, 41 (09) : 1296 - 1299
  • [7] Novel Decimation Topology with Improved Jitter Performance for Clock and Data Recovery Systems
    Allam, Muhamed F.
    Abdelrahman, Ahmed
    Omran, Hesham
    Ibrahim, Sameh A.
    2021 19TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2021,
  • [8] Performance of digital collective antenna systems in the presence of phase noise and clock jitter
    Merchan, S
    Armada, AG
    Garcia, JL
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1997, 43 (02) : 188 - 196
  • [9] A digital PLL with 5-phase digital PFD for low long-term jitter clock recovery
    Oh, Tae-Young
    Yi, Seung-Hyun
    Yang, Sung-Hyun
    Lim, Byong-Chan
    Hong, Kuk-Tae
    PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2006, : 745 - 748
  • [10] A statistical jitter tolerance estimation applied for clock and data recovery using oversampling
    Yin, Jing
    Zeng, Lie-Guang
    TENCON 2006 - 2006 IEEE REGION 10 CONFERENCE, VOLS 1-4, 2006, : 1933 - +