FPGA design and hardware implementation of a convolutional neural network for classification of saccadic eye movements

被引：0

作者：

Cano, Carlos ^{[1
]}

Stoean, Ruxandra ^{[2
]}

Joya, Gonzalo ^{[1
]}

机构：

[1] Univ Malaga, Dept Tecnol Elect, ETSI Telecomunicac, Campus Teatinos, E-29071 Malaga, Spain

[2] Univ Craiova, Fac Sci, Dept Comp Sci, 13 AI Cuza St, Craiova 200585, Romania

来源：

ANNALS OF THE UNIVERSITY OF CRAIOVA-MATHEMATICS AND COMPUTER SCIENCE SERIES | 2018年 / 45卷 / 02期

关键词：

Field programmable gate arrays (FPGA); Convolutional Neural Network (CNN); Saccade classification; Hardware optimization; High-level Synthesis (HLS); Algorithm design and analysis;

D O I：

暂无

中图分类号：

O1 [数学];

学科分类号：

0701 ; 070101 ;

摘要：

The paper presents an efficient design and implementation of a convolutional neural network on an FPGA device. The aim is not only theoretical but also practical, since the solution will be used in a medical clinic dealing with SpinoCerebellar Ataxia type 2 as part of a larger project. Hence, the current work targets both high learning capabilities as well as portability. The former has been tackled through the apppointment a convolutional neural network while the latter is concerned with the hardware implementation of the complex network on a FPGA. The preliminary results encourage the further exploitation of the proposed solution.

引用

页码：263 / 274

页数：12

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