A HIGH-SPEED BICMOS TRISTATE BUFFER

被引：3
|
作者：
KUO, JB
LIAO, HJ
机构：
[1] Department of Electrical Engineering, National Taiwan University
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1993年 / 40卷 / 07期
关键词：
D O I：
10.1109/82.238372
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a high-speed BiCMOS tristate buffer with a simple bipolar device pull-up structure for driving a large capacitive load. According to SPICE simulation results, the BiCMOS tristate buffer, which occupies about an identical area, has a 2X improvement in delay time as compared to the CMOS tristate buffer.
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页码：440 / 443
页数：4
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