SI BIPOLAR 2-GHZ 6-BIT FLASH A/D CONVERSION LSI

被引:26
|
作者
WAKIMOTO, T
AKAZAWA, Y
KONAKA, S
机构
关键词
D O I
10.1109/4.90030
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:1345 / 1350
页数:6
相关论文
共 50 条
  • [1] A 6-BIT JOSEPHSON FLASH A/D CONVERTER WITH GHz INPUT BANDWIDTH
    Bradley, Paul
    IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 1993, 3 (01) : 2550 - 2557
  • [2] A bipolar ECL comparator for a 4 GS/s and 6-bit flash A-to-D converter
    Kawada, S
    Sugimoto, Y
    IEICE TRANSACTIONS ON ELECTRONICS, 2004, E87C (06): : 1022 - 1024
  • [3] A 2-V 2-GHz Si-bipolar direct-conversion quadrature modulator
    Tsukahara, T
    Ishikawa, M
    Muraguchi, M
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (02) : 263 - 267
  • [4] A power efficient decoder for 2GHz, 6-bit CMOS Flash-ADC architecture
    Ali, SM
    Raut, R
    Sawan, M
    FIFTH INTERNATIONAL WORKSHOP ON SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS, PROCEEDINGS, 2005, : 123 - 126
  • [5] A 6-BIT MONOLITHIC VIDEO FLASH CONVERTER
    LONSBOROUGH, M
    MICROELECTRONICS AND RELIABILITY, 1981, 21 (06): : 837 - 850
  • [6] 6-bit 500 MHz flash A/D converter with new design techniques
    Hsu, CW
    Kuo, TH
    IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 2003, 150 (05): : 460 - 464
  • [7] A 6-bit 1 GHz acquisition speed CMOS flash ADC with digital error correction
    Uyttenhove, K
    Marques, A
    Steyaert, M
    PROCEEDINGS OF THE IEEE 2000 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2000, : 249 - 252
  • [8] Error suppressing encode logic of FCDL in 6-bit flash A/D converter
    Ono, K
    Matsuura, T
    Imaizumi, E
    Okazawa, H
    Shimokawa, R
    PROCEEDINGS OF THE 1996 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 1996, : 200 - 203
  • [9] 6-bit flash ADC with dynamic element matching
    Sall, Erik
    Vesterbacka, Mark
    24TH NORCHIP CONFERENCE, PROCEEDINGS, 2006, : 159 - +
  • [10] A 1-GHZ 6-BIT ADC SYSTEM
    POULTON, K
    CORCORAN, JJ
    HORNAK, T
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (06) : 962 - 970