A FRAMEWORK AND METHOD FOR HIERARCHICAL TEST-GENERATION

被引：4
|
作者：
CALHOUN, JD
BRGLEZ, F
机构：
[1] MCNC,CTR MICROELECTR,RES TRIANGLE PK,NC 27709
[2] N CAROLINA STATE UNIV,DEPT ELECT & COMP ENGN,RALEIGH,NC 27695
[3] DUKE UNIV,DEPT COMP SCI,DURHAM,NC 27706
来源：
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1992年 / 11卷 / 01期
关键词：
D O I：
10.1109/43.108618
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We introduce an algorithm for hierarchical test generation based on module-oriented decision making. The algorithm deals with combinational logic modules and the traditional single-stuck-at fault model. Modules and faults are captured at the functional as well as the gate level. The benefits of hierarchy are realized by introducing a generic module representation and the concepts of a dynamic netlist and a dynamic calculus.
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页码：45 / 67
页数：23
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