ENHANCEMENT OF ELECTRON-MOBILITY BY PREVENTING PIT FORMATION AT THE IN0.52AL0.48AS/IN0.8GA0.2AS HETEROINTERFACE USING AN INSERTED IN0.53GA0.47AS LAYER

被引:5
|
作者
NAKAYAMA, T
MIYAMOTO, H
OISHI, E
SAMOTO, N
机构
[1] Kansai Electronics Research Laboratories, NEC Corporation, Otsu, Shiga, 520
关键词
D O I
10.1016/0022-0248(95)80133-W
中图分类号
O7 [晶体学];
学科分类号
0702 ; 070205 ; 0703 ; 080501 ;
摘要
The electron mobility of an In0.52Al0.48As/In0.8Ga0.2As structure with an In0.53Ga0.47As buffer is enhanced by about 15% to as high as 16,200 cm(2)/V . s, as compared to a structure without an In0.53Ga0.47As buffer. In this In0.52Al0.48As/In0.53Ga0.47As/In0.8Ga0.2As structure, smooth interfaces are formed, whereas in the In0.52Al0.48As/In0.8Ga0.2 As structure without the In0.53Ga0.47As buffer. pits are formed. additionally, optimization of the In0.53Ga0.47As buffer thickness for field effect transistor (FET) application is carried out by electron mobility measurements and electron density distribution calculations, Since a short gate length, less than 0.2 mu m, FET requires the electron distribution to be close to that of the gate electrode, we determined that nm is the optimum thickness for the In0.53Ga0.47As buffer. The optimum thickness enhances the electron mobility and moves the peak position of the electron density away from the gate electrode by less than 0.6 nm, as compared to a structure without the In0.53Ga0.47As buffer.
引用
收藏
页码:1220 / 1224
页数:5
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