共 50 条
- [23] Front-end Circuit without Sample-and-hold Amplifier for Pipelined ADC Hunan Daxue Xuebao/Journal of Hunan University Natural Sciences, 2020, 47 (10): : 86 - 91
- [24] A fast two-stage sample-and-hold amplifier for pipelined ADC application DELTA 2008: FOURTH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, PROCEEDINGS, 2008, : 99 - +
- [27] Complete time-domain behavioral model of Sample-and-Hold Amplifier using SIMULINK® 2008 IEEE MEDITERRANEAN ELECTROTECHNICAL CONFERENCE, VOLS 1 AND 2, 2008, : 102 - 107
- [28] ACQUISITION ERROR IN SAMPLE-AND-HOLD CIRCUIT IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS AND CONTROL INSTRUMENTATION, 1978, 25 (02): : 181 - 183
- [29] A Rail-to-Rail Full Clock Fully Differential Rectifier and Sample-and-Hold Amplifier 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 1571 - 1574