A CPU CHIP-ON-BOARD MODULE

被引:0
|
作者
TANAKA, A
SHINOHARA, H
YAMADA, K
HONDA, M
HATADA, T
YAMAGIWA, A
SHIRAI, Y
机构
[1] HITACHI LTD,PROD ENGN RES LAB,HOKOHAMI 244,JAPAN
[2] HITACHI LTD,DIV OFF SYST,KANAGAWA 24304,JAPAN
[3] HITACHI LTD,CTR DEVICE DEV,TOKYO 198,JAPAN
[4] HITACHI LTD,MECH ENGN RES LAB,IBARAKI 300,JAPAN
关键词
D O I
10.1109/96.296439
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
A CPU chip-on-board module for low and midrange computers is described. The module consists of a CPU bare chip, 24 SRAM's packaged in SOJ packages, and some decoupling capacitors. The module substrate is a printed circuit board (PCB) made of bismaleimide-triazine resin. The module (156 mm x 58 mm) consists of four signal metal layers and four power/ground metal layers. A square clearance hole (17 mm x 17 mm) for the CPU is formed in the central part of the PCB. A thermal spreading metal is glued to the PCB from the rear side, covering the square hole, and the CPU chip is die-bonded onto the metal plate. The thermal resistance can be made smaller than 2-degrees-C/W with 0.4 nl/s of wind velocity. Numerical analysis of electrical characteristics of the module shows that it can reduce signal delay time from the CPU to cache memories by 10% c compared with that of a daughter board type module with the CPU packaged in a pin-grid array package. It is estimated that simultaneously switched noise can be reduced by 60% from that of the daughter board type module.
引用
收藏
页码:115 / 118
页数:4
相关论文
共 50 条
  • [41] 100 Gbps (4 x 25 Gbps) Optical Receiver Module Packaged in Chip-on-Board Based on Germanium Photodetector
    Kim, Do-Won
    Lim, Andy Eu Jin
    Raja, M. Kumarasamy
    Yang, Jason Liow Tsung
    Kulkarni, Vishal Vinayak
    Bhattacharya, Surya
    Lo, Guo Qiang
    ICMAT 2017 SYMPOSIUM (M TO Z), 2017, 216 : 144 - 151
  • [42] New Probabilistic Reliability Model Describing the Risk of Chip Fracture in the Chip-On-Board Technology
    Steiert, Matthias
    Wilde, Juergen
    2012 4TH ELECTRONIC SYSTEM-INTEGRATION TECHNOLOGY CONFERENCE (ESTC), 2012,
  • [43] Modeling of LED scheme for street lighting on the basis of chip-on-board scheme
    Voznesenskaya, Anna
    Romanova, Galina
    Qiao, Xuanlin
    ILLUMINATION OPTICS V, 2018, 10693
  • [44] Research on Luminance Distributions of Chip-On-Board Light-Emitting Diodes
    Czyzewski, Dariusz
    CRYSTALS, 2019, 9 (12):
  • [45] Fabrication and qualification of coated chip-on-board technology for miniaturized space systems
    Maurer, RH
    Le, BQ
    Nhan, E
    Lew, AL
    Darrin, MAG
    EECC'97 - PROCEEDINGS OF THE THIRD ESA ELECTRONIC COMPONENTS CONFERENCE, 1997, 395 : 199 - 204
  • [46] In-situ stress state measurements during chip-on-board assembly
    Zou, Yida
    Suhling, Jeffrey C.
    Wayne Johnson, R.
    Jaeger, Richard C.
    Mian, A.K.M.
    IEEE Transactions on Electronics Packaging Manufacturing, 1999, 22 (01): : 38 - 52
  • [47] A design of thin film thermoelectric cooler for Chip-on-Board(COB) assembly
    Yoo, Jung-Ho
    Lee, Hyun-Ju
    Kim, Nam-Jae
    Kim, Shi-Ho
    Transactions of the Korean Institute of Electrical Engineers, 2010, 59 (09): : 1615 - 1620
  • [48] Optimizing material and processing characteristics of the encapsulating resin for chip-on-board (COB)
    Nickel, S
    Ehrenstein, GW
    ANTEC'97 - PLASTICS SAVING PLANET EARTH, CONFERENCE PROCEEDINGS, VOLS 1 - 3, 1997, : 1433 - 1437
  • [49] Design of optical structure for chip-on-board wafer level packaging LEDs
    Ma, Jian-She
    He, Li-Yun
    Liu, Tong
    Su, Ping
    Guangxue Jingmi Gongcheng/Optics and Precision Engineering, 2013, 21 (04): : 904 - 910
  • [50] CALICE SiW ECAL - development and test of the chip-on-board PCB solution
    Irles, A.
    JOURNAL OF INSTRUMENTATION, 2020, 15 (05)