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- [8] Program/Erase Characteristics of Twin Poly-Si Thin Film Transistors EEPROM with Tri-Gate Nanowires structure 2008 IEEE SILICON NANOELECTRONICS WORKSHOP, 2008, : 139 - 140
- [9] Gate-overlapped lightly doped drain poly-Si thin film transistors by employing low-temperature doping techniques JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (3B): : 1067 - 1070
- [10] Characteristics of bottom gate thin film transistors with silicon rich poly-Si1-xGex and poly-Si fabricated by reactive thermal chemical vapor deposition AMORPHOUS AND NANOCRYSTALLINE SILICON-BASED FILMS-2003, 2003, 762 : 253 - 258