共 50 条
- [1] A single/double precision floating-point multiplier design for multimedia applications Istanb. Univ. J. Electr. Electron. Eng., 2009, 1 (827-831):
- [2] A quadruple precision and dual double precision floating-point multiplier EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS, 2003, : 76 - 81
- [3] An IEEE 754 Double-Precision Floating-Point Multiplier for Denormalized and Normalized Floating-Point Numbers PROCEEDINGS OF THE ASAP2015 2015 IEEE 26TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, 2015, : 62 - 63
- [4] Efficient Implementation of IEEE Double Precision Floating-Point Multiplier on FPGA IEEE REGION 10 COLLOQUIUM AND THIRD INTERNATIONAL CONFERENCE ON INDUSTRIAL AND INFORMATION SYSTEMS, VOLS 1 AND 2, 2008, : 334 - 337
- [8] VLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique Circuits, Systems, and Signal Processing, 2013, 32 : 15 - 27
- [10] Energy-Efficient Multiple-Precision Floating-Point Multiplier for Embedded Applications Journal of Signal Processing Systems, 2013, 72 : 43 - 55