A Priori Implementation Effort Estimation for Hardware Design Based on Independent Path Analysis

被引:1
|
作者
Abildgren, Rasmus [1 ]
Diguet, Jean-Philippe [2 ]
Bomel, Pierre [2 ]
Gogniat, Guy [2 ]
Koch, Peter [3 ]
Le Moullec, Yannick [3 ]
机构
[1] Aalborg Univ, CISS, Selma Lagerlofs Vej 300, DK-9220 Aalborg, Denmark
[2] Univ Bretagne Sud, Ctr Rech, Lab STICC UMR CNRS 3192, F-56321 Lorient, France
[3] Aalborg Univ, CSDR, DK-9220 Aalborg, Denmark
关键词
D O I
10.1155/2008/280347
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a metric-based approach for estimating the hardware implementation effort (in terms of time) for an application in relation to the number of linear-independent paths of its algorithms. We exploit the relation between the number of edges and linear-independent paths in an algorithm and the corresponding implementation effort. We propose an adaptation of the concept of cyclomatic complexity, complemented with a correction function to take designers' learning curve and experience into account. Our experimental results, composed of a training and a validation phase, show that with the proposed approach it is possible to estimate the hardware implementation effort. This approach, part of our light design space exploration concept, is implemented in our framework "Design-Trotter" and offers a new type of tool that can help designers and managers to reduce the time-to-market factor by better estimating the required implementation effort. Copyright (C) 2008 Rasmus Abildgren et al.
引用
收藏
页数:12
相关论文
共 50 条
  • [1] A Method for A Priori Implementation Effort Estimation for Hardware Design
    Abildgren, Rasmus
    Diguet, Jean-Philippe
    Bomel, Pierre
    Gogniat, Guy
    Koch, Peter
    Le Moullec, Yannick
    ICED: 2008 INTERNATIONAL CONFERENCE ON ELECTRONIC DESIGN, VOLS 1 AND 2, 2008, : 550 - +
  • [2] Hardware Design and Implementation of Fast DOA Estimation Method Based on Multicore DSP
    Guo, Rui
    Zhao, Yingxiao
    Zhang, Yue
    Lin, Qianqiang
    Chen, Zengping
    HIGH-PERFORMANCE COMPUTING IN GEOSCIENCE AND REMOTE SENSING VI, 2016, 10007
  • [3] Hardware Design and implementation of a Direction of Arrival estimation block
    Khallaayoun, Ahmed
    Olson, Andy
    Taxinger, Aaron Shawn
    2012 IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM (APSURSI), 2012,
  • [4] Design, Implementation and Analysis of Efficient Hardware-based Security Primitives
    Anandakumar, N. Nalla
    Sanadhya, Somitra Kumar
    Hashmi, Mohammad S.
    2020 IFIP/IEEE 28TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2020, : 198 - 199
  • [5] Design and Implementation of an Effort Estimation Tool for Electric Vehicle Development
    Soltes, Martin
    Reif, Armin
    Koberstaedt, Sascha
    Lienkamp, Markus
    2018 IEEE 22ND INTERNATIONAL CONFERENCE ON INTELLIGENT ENGINEERING SYSTEMS (INES 2018), 2018, : 249 - 254
  • [6] Hardware implementation of PQF based on VLSI design
    Guan, H
    Dong, ZW
    5TH INTERNATIONAL SYMPOSIUM ON BROADCASTING TECHNOLOGY, PROCEEDINGS (ISBT'97, BEIJING), 1997, : 337 - 343
  • [7] A New Design of Hardware Trojan Based on Path Delay
    Sun, Hai-lin
    Li, Lei
    Zhou, Wan-ting
    INTERNATIONAL CONFERENCE ON MECHANICAL, ELECTRONIC AND INFORMATION TECHNOLOGY (ICMEIT 2018), 2018, : 419 - 423
  • [8] Hardware Design and Implementation of DOA Estimation Algorithms for Spherical Array Antennas
    Xie, Yuelei
    Peng, Chengcheng
    Jiang, Xing
    Shan Ouyang
    2014 IEEE INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, COMMUNICATIONS AND COMPUTING (ICSPCC), 2014, : 219 - 223
  • [9] Design and implementation of a cloud server based on hardware virtualization
    Zheng C.-M.
    Yao X.-X.
    Zhou F.
    Zheng X.-F.
    Yang X.-J.
    Dai R.
    Gongcheng Kexue Xuebao/Chinese Journal of Engineering, 2022, 44 (11): : 1935 - 1945
  • [10] Fast hardware implementation of Gabor filter based motion estimation
    Spinéi, A
    Pellerin, D
    Fernandes, D
    Hérault, J
    INTEGRATED COMPUTER-AIDED ENGINEERING, 2000, 7 (01) : 67 - 77