EFFICIENT SIMULATION OF MOS CIRCUITS

This paper describes new techniques which significantly speed up classical circuit simulation of MOS LSI circuits. By taking advantage of the unilateral properties of MOS transistors, modifications of Newton's method are developed reducing the computational effort for the Gaussian elimination mainly for large circuits. Latency is another property of MOS circuits which can be exploited to enhance simulation efficiency. This paper describes a new latency exploitation technique. In contrast to methods published previously, no partitioning into subcircuits is required. These new techniques can be easily implemented in existing circuit simulators.