A NEW ARCHITECTURE FOR FAST MODULAR MULTIPLICATION

被引：0
|
作者：
JUANG, YJ
LU, EH
LEE, JY
CHEN, CH
机构：
来源：
1989 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS: PROCEEDINGS OF TECHNICAL PAPERS | 1989年
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
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页码：357 / 360
页数：4
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