HIGH INSIDE - MEMOIRS OF A BASEBALL WIFE - TORREZ,DG, LIZOTTE,K

被引:0
|
作者
HALPERT, FE
机构
关键词
D O I
暂无
中图分类号
D0 [政治学、政治理论];
学科分类号
0302 ; 030201 ;
摘要
引用
收藏
页码:743 / 744
页数:2
相关论文
共 41 条
  • [1] Impact of optimization on high-k material gate spacer in DG-FinFET device
    Roslan, Ameer F.
    Salehuddin, F.
    Zain, A. S. M.
    Kaharudin, K. E.
    [J]. PROCEEDINGS OF MECHANICAL ENGINEERING RESEARCH DAY 2019 (MERD'19), 2019, : 150 - 151
  • [2] Analysis of Harmonic distortion in asymmetric underlap DG-MOSFET with high-k spacer
    Dutta, Arka
    Koley, Kalyan
    Sarkar, Chandan K.
    [J]. MICROELECTRONICS RELIABILITY, 2014, 54 (6-7) : 1125 - 1132
  • [3] Impact of High-K Gate Stack on Subthreshold Performance of Double-Gate (DG) MOSFETs
    Goel, Ekta
    [J]. SILICON, 2022, 14 (17) : 11539 - 11544
  • [4] Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET
    Pradhan, K. P.
    Mohapatra, S. K.
    Sahu, P. K.
    Behera, D. K.
    [J]. MICROELECTRONICS JOURNAL, 2014, 45 (02) : 144 - 151
  • [5] Impact of Matched High-K Gate Dielectric based DG-MOSFET on SRAM performance
    Gupta, Mitashra
    Nandi, Ashutosh
    [J]. 2017 4TH INTERNATIONAL CONFERENCE ON POWER, CONTROL & EMBEDDED SYSTEMS (ICPCES), 2017,
  • [6] Impact of High-K Gate Stack on Subthreshold Performance of Double-Gate (DG) MOSFETs
    Ekta Goel
    [J]. Silicon, 2022, 14 : 11539 - 11544
  • [7] Analysis of high-k spacer on symmetric underlap DG-MOSFET with Gate Stack architecture
    Das, Rahul
    Chakraborty, Shramana
    Dasgupta, Arpan
    Dutta, Arka
    Kundu, Atanu
    Sarkar, Chandan K.
    [J]. SUPERLATTICES AND MICROSTRUCTURES, 2016, 97 : 386 - 396
  • [8] Subthreshold Analog/RF Performance Enhancement of Underlap DG FETs With High-k Spacer for Low Power Applications
    Koley, Kalyan
    Dutta, Arka
    Syamal, Binit
    Saha, Samar K.
    Sarkar, Chandan Kumar
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (01) : 63 - 69
  • [9] Investigation of DC Characteristic on DG-Tunnel FET With high-K Dielectric Using Distinct Device Parameter
    Thakre, Shraddha
    Beohar, Ankur
    Vijayvargiya, Vikas
    Yadav, Nandakishor
    Vishvakarma, Santosh Kumar
    [J]. PROCEEDINGS OF 2016 IEEE INTERNATIONAL SYMPOSIUM ON NANOELECTRONIC AND INFORMATION SYSTEMS (INIS), 2016, : 124 - 128
  • [10] Performance Study of GCGS DG-MOSFETs for Asymmetric Doping and High K Oxide Material Using NQS Method
    Swain, Sanjit Kumar
    Adak, Sarosij
    Parija, Saradiya
    Sarkar, Chandan Kumar
    [J]. JOURNAL OF ACTIVE AND PASSIVE ELECTRONIC DEVICES, 2018, 13 (2-3): : 149 - 163