共 50 条
- [41] Analysis and simulation of an out-of-order execution model in vector multiprocessor systems [J]. Parallel Comput, 13 (1963-1986):
- [42] High Performance Instruction Scheduling Circuits for Out-of-Order Soft Processors [J]. 2016 IEEE 24TH ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 2016, : 9 - 16
- [44] Issue logic for a 600-MHz out-of-order execution microprocessor [J]. IEEE J Solid State Circuits, 5 (707-712):
- [46] Verification of an advanced Mips-type out-of-order execution algorithm [J]. COMPUTER AIDED VERIFICATION, 2004, 3114 : 414 - 426
- [47] A 600MHz superscalar RISC microprocessor with out-of-order execution [J]. 1997 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 1997, 40 : 176 - 177
- [50] Exploring the Performance Limits of Out-of-order Commit [J]. ACM INTERNATIONAL CONFERENCE ON COMPUTING FRONTIERS 2017, 2017, : 211 - 220