Fault Tolerant System Design using Evolved Virtual Reconfigurable Circuit

被引:0
|
作者
Dhanasekaran, D. [1 ]
Bagan, K. Boopathy [2 ]
Ravi, S. [3 ]
机构
[1] SVCE, Pennalur 602105, Sriperumbudur, India
[2] Madras Inst Technol, Madras 44, Tamil Nadu, India
[3] Dr MGR Deemed Univ, ECE Dept, Madras 95, Tamil Nadu, India
关键词
Virtual Reconfigurable circuit; Evolvable hardware; Sensor validation;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A majority of applications require cooperation of two or more independently designed, separately located, but mutually affecting subsystems. In addition to good behavior of each of the subsystems, an effective coordination is very important to achieve the desired overall performance. However, such a co-ordination is very difficult to attain mainly due to the lack of precise system models and/or dynamic parameters. In such situations, the evolvable hardware (EHW) techniques, which can achieve the sophisticated level of information processing the brain is capable of, can excel. In this paper, a new virtual reconfigurable circuit based sensor validation scheme using the techniques of evolved operators is presented. The idea of this work is to develop a system that is tolerant to sensor failures (fault tolerance) by utilizing multiple sensor inputs connected to a programmable VLSI chip. The approach chosen here is based on functional level evolution whose architecture contains many nonlinear functions and uses an evolutionary algorithm to evolve the best configuration. The system is tested for its effectiveness by choosing a real-time process control plant with three input sensors and introducing different sensor failures such as: sensor fails as open circuit, sensor fails as short circuit, noise added to individual sensors, multiple sensor failure etc.. In each case the mean square error is computed and used as the performance index.
引用
收藏
页码:64 / 72
页数:9
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