NEURON MOS BINARY-LOGIC INTEGRATED-CIRCUITS .1. DESIGN FUNDAMENTALS AND SOFT-HARDWARE-LOGIC CIRCUIT IMPLEMENTATION

被引:86
|
作者
SHIBATA, T [1 ]
OHMI, T [1 ]
机构
[1] TOHOKU UNIV,FAC ENGN,DEPT ELECTR,SENDAI,MIYAGI 980,JAPAN
关键词
D O I
10.1109/16.199362
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this part of the paper, we describe the fundamental designing principles of binary-logic circuits using a newly developed highly functional device called Neuron MOS Transistor(nuMOS). NuMOS is a single MOS transistor simulating the function of biological neurons. In order to facilitate the logic design procedures employing this new-concept transistor, a graphical technique which we call Floating-Gate Potential Diagram has been developed. It is shown that any Boolean functions can be generated using a common circuit configuration of two-stage nuMOS inverters. One of the most striking features of nuMOS binary-logic application is the realization of a so-called Soft Hardware Logic Circuit. The circuit can represent any logic functions such as AND, OR, NAND, NOR, Exclusive-NOR, Exclusive-OR, etc., by adjusting external control signals without any modifications in its hardware configuration. The circuit allows us to build real-time reconfigurable systems. Test circuits were fabricated by a double-polysilicon CMOS process and their operations were experimentally verified.
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页码:570 / 576
页数:7
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