CHARGE-BALANCING FLOATING-POINT ANALOG-TO-DIGITAL CONVERTER USING A CYCLIC CONVERSION

This paper describes a switch capacitor charge-balancing floating-point A/D converter (FADC) on the basis of a cyclic conversion. The interesting point is that the proposed charge-balancing FADC performs the exponent conversion without using conventional binary-weighted capacitor arrays, but through software. This makes its circuit very simple, with only two stages of switched-capacitor integrators and a comparator. Its main advantages are: speed improvement, reduced hardware, one-more-bit resolution than the conventional FADC, theoretically the accuracy has nothing to do with capacitor mismatch between the charging capacitor and the integral capacitor, and no misalignment errors which are unavoidable in the conventional charge-balancing FADC using binary-weighted switched-capacitor arrays to perform the exponent conversion.