共 50 条
- [1] A hardware software cosimulation backplane with automatic interface generation [J]. PROCEEDINGS OF THE ASP-DAC '98 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1998 WITH EDA TECHNO FAIR '98, 1998, : 177 - 182
- [2] SoC synthesis with automatic hardware software interface generation [J]. 16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2003, : 585 - 590
- [3] Rapid embedded hardware/software system generation [J]. 18TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: POWER AWARE DESIGN OF VLSI SYSTEMS, 2005, : 111 - 116
- [4] Automatic Hardware/Software Interface Generation for SynDEx-mixte [J]. 2014 1ST INTERNATIONAL CONFERENCE ON ADVANCED TECHNOLOGIES FOR SIGNAL AND IMAGE PROCESSING (ATSIP 2014), 2014, : 512 - 516
- [5] IRES: An integrated software and hardware interface framework for reconfigurable embedded system [J]. IET COMPUTERS AND DIGITAL TECHNIQUES, 2010, 4 (01): : 27 - 37
- [6] Automatic Generation of Hardware/Software Interfaces [J]. ACM SIGPLAN NOTICES, 2012, 47 (04) : 325 - 336
- [7] Automatic Generation of Hardware/Software Interfaces [J]. ASPLOS XVII: SEVENTEENTH INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS, 2012, : 325 - 336
- [8] Automatic generation of hardware/software interface with product-specific debugging tools [J]. EMBEDDED AND UBIQUITOUS COMPUTING, PROCEEDINGS, 2006, 4096 : 742 - 753