System-level parallelism and concurrency maximisation in reconfigurable computing applications

被引：0
|
作者：
El-Araby, Esam [1 ]
Taher, Mohamed [1 ]
Gaj, Kris [2 ]
El-Ghazawi, Tarek [1 ]
Caliga, David [3 ]
Alexandridis, Nikitas [1 ]
机构：
[1] George Washington Univ, Dept Elect & Comp Engn, 801 22nd St NW, Washington, DC 20052 USA
[2] George Mason Univ, Elect & Comp Engn Dept, Fairfax, VA 22030 USA
[3] SRC Comp Inc, Colorado Springs, CO 80907 USA
来源：
INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS | 2006年 / 2卷 / 1-2期
关键词：
Reconfigurable Computers (RC); Field Programmable Gate Arrays (FPGA); Direct Memory Access (DMA);
D O I：
10.1504/IJES.2006.010165
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Reconfigurable computers can leverage the synergism between conventional processors and FPGAs to provide both hardware functionalities and general-purpose computers flexibility. In a large class of applications on these platforms, the data-transfer overheads can be comparable or even greater than the useful computations which can degrade the overall performance. In this paper, we perform a theoretical and experimental study of this specific limitation. The mathematical formulation of the problem has been experimentally verified on the state-of-the-art reconfigurable platform, SRC-6E. We demonstrate and quantify the possible solution to this problem that exploits the system-level parallelism within reconfigurable machines.
引用
收藏
页码：62 / 72
页数：11
相关论文
共 50 条
  • [31] Fault Tolerance Management in Cloud Computing: A System-Level Perspective
    Jhawar, Ravi
    Piuri, Vincenzo
    Santambrogio, Marco
    [J]. IEEE SYSTEMS JOURNAL, 2013, 7 (02): : 288 - 297
  • [32] Towards System-Level Electromagnetic Field Simulation on Computing Clouds
    Gope, Dipanjan
    Jandhyala, Vikram
    Wang, Xiren
    Macmillen, Don
    Camposano, Raul
    Chakraborty, Swagato
    Pingenot, James
    Williams, Devan
    [J]. 2011 IEEE 20TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2011, : 167 - 170
  • [33] Enhancing Security by System-Level Virtualization in Cloud Computing Environments
    Sun, Dawei
    Chang, Guiran
    Tan, Chunguang
    Wang, Xingwei
    [J]. INTELLIGENT COMPUTING AND INFORMATION SCIENCE, PT I, 2011, 134 (0I): : 565 - +
  • [34] SCHEDULING SUPPORT FOR CONCURRENCY AND PARALLELISM IN THE MACH OPERATING SYSTEM
    BLACK, DL
    [J]. COMPUTER, 1990, 23 (05) : 35 - 43
  • [35] System-level optimization of baseband filters for communication applications
    Fernández-Bootello, JF
    Delgado-Restituto, M
    Rodríguez-Vázquez, A
    [J]. VLSI CIRCUITS AND SYSTEMS, 2003, 5117 : 245 - 256
  • [36] System-level support for macroprogramming of networked sensing applications
    Bakshi, A
    Pathak, A
    Prasanna, VK
    [J]. PSC '05: Proceedings of the 2005 International Conference on Pervasive Systems and Computing, 2005, : 3 - 9
  • [37] System-level assertions: approach for electronic system-level verification
    Sohofi, Hassan
    Navabi, Zainalabedin
    [J]. IET COMPUTERS AND DIGITAL TECHNIQUES, 2015, 9 (03): : 142 - 152
  • [38] Symbolic system-level design methodology for multi-mode reconfigurable systems
    Wildermann, Stefan
    Reimann, Felix
    Ziener, Daniel
    Teich, Juergen
    [J]. DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, 2013, 17 (02) : 343 - 375
  • [39] System-level modelling and implementation technique for run-time reconfigurable systems
    Rissa, T
    Vasilko, M
    Niittylahti, J
    [J]. 10TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2002, : 295 - 296
  • [40] Symbolic system-level design methodology for multi-mode reconfigurable systems
    Stefan Wildermann
    Felix Reimann
    Daniel Ziener
    Jürgen Teich
    [J]. Design Automation for Embedded Systems, 2013, 17 : 343 - 375
12345