ANTIFUSE FIELD-PROGRAMMABLE GATE ARRAYS

被引:30
|
作者
GREENE, J [1 ]
HAMDY, E [1 ]
BEAL, S [1 ]
机构
[1] ACTEL CORP,SUNNYVALE,CA 94086
关键词
D O I
10.1109/5.231343
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An antifuse is an electrically programmable two-terminal device with small area and low parasitic resistance and capacitance. Field programmable gate arrays (FPGA's) using antifuses in a segmented channel routing architecture now offer the digital logic capabilities of an 8000-gate conventional gate array and system speeds of 40-60 MHz, A brief survey of antifuse technologies is provided. The antifuse technology, routing architecture, logic module, design automation, programming, testing and use of ACT(TM) antifuse FPGA's are described. Some inherent tradeoffs involving the antifuse characteristics, routing architecture and logic module are illustrated.
引用
收藏
页码:1042 / 1056
页数:15
相关论文
共 50 条
  • [1] Field-programmable gate arrays
    Marchal, P
    [J]. COMMUNICATIONS OF THE ACM, 1999, 42 (04) : 57 - 59
  • [2] FIELD-PROGRAMMABLE GATE ARRAYS
    JAY, C
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 1993, 17 (07) : 370 - 370
  • [3] Field-programmable gate arrays
    Bhatia, D
    [J]. VLSI DESIGN, 1996, 4 (04) : R1 - R2
  • [4] A SUBLITHOGRAPHIC ANTIFUSE STRUCTURE FOR FIELD-PROGRAMMABLE GATE ARRAY APPLICATIONS
    CHEN, KL
    LIU, DKY
    MISIUM, G
    GOSNEY, WM
    WANG, SJ
    CAMP, J
    TIGELAAR, H
    [J]. IEEE ELECTRON DEVICE LETTERS, 1992, 13 (01) : 53 - 55
  • [5] FIELD-PROGRAMMABLE GATE ARRAYS - INTRODUCTION
    TRIMBERGER, S
    [J]. IEEE DESIGN & TEST OF COMPUTERS, 1992, 9 (03): : 3 - 5
  • [6] The future of field-programmable gate arrays
    Alfke, P
    [J]. PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS, 1999, : 36 - 40
  • [7] ARCHITECTURE OF FIELD-PROGRAMMABLE GATE ARRAYS
    ROSE, J
    ELGAMAL, A
    SANGIOVANNIVINCENTELLI, A
    [J]. PROCEEDINGS OF THE IEEE, 1993, 81 (07) : 1013 - 1029
  • [8] SCALED DIELECTRIC ANTIFUSE STRUCTURE FOR FIELD-PROGRAMMABLE GATE ARRAY APPLICATIONS
    LIU, DKY
    CHEN, KL
    TIGELAAR, H
    PATERSON, J
    CHEN, SO
    [J]. IEEE ELECTRON DEVICE LETTERS, 1991, 12 (04) : 151 - 153
  • [9] SYNTHESIS METHODS FOR FIELD-PROGRAMMABLE GATE ARRAYS
    SANGIOVANNIVINCENTELLI, A
    ELGAMAL, A
    ROSE, J
    [J]. PROCEEDINGS OF THE IEEE, 1993, 81 (07) : 1057 - 1083
  • [10] Hitting a nerve with field-programmable gate arrays
    Mencer, Oskar
    Allison, Dennis
    Blatt, Elad
    Cummings, Mark
    Flynn, Michael J.
    Harris, Jerry
    Hewitt, Carl
    Jacobson, Quinn
    Lavasani, Maysam
    Moazami, Mohsen
    Murray, Hal
    Nikravesh, Masoud
    Nowatzyk, Andreas
    Shand, Mark
    Shirazi, Shahram
    [J]. Queue, 2020, 18 (03):