共 50 条
- [43] Automated implementation of digital circuits in current-mode FPGA chips [J]. EXPERIENCE OF DESIGNING AND APPLICATION OF CAD SYSTEMS IN MICROELECTRONICS, 2003, : 223 - 225
- [45] NEURAL-NETWORK [J]. JOURNAL OF THE JAPANESE SOCIETY FOR FOOD SCIENCE AND TECHNOLOGY-NIPPON SHOKUHIN KAGAKU KOGAKU KAISHI, 1995, 42 (07): : 541 - 541
- [46] CMOS Current-Mode Implementation of Fractional-Power Functions [J]. Circuits, Systems, and Signal Processing, 2012, 31 : 61 - 75
- [47] An analog current-mode 2-D DCT implementation [J]. 22ND NORCHIP CONFERENCE, PROCEEDINGS, 2004, : 245 - 248
- [48] Versatile insensitive current-mode universal biquad implementation using current conveyors [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2001, 48 (04): : 409 - 413
- [50] A digitally programmable current mode analog shunting inhibition cellular neural network [J]. ICECS 2000: 7TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS & SYSTEMS, VOLS I AND II, 2000, : 962 - 965