The purity check of silicon by DLTS and other capacitance spectroscopy techniques requires high-quality ohmic contact to the silicon structure with a gold Schottky barrier using a vanadium silicide layer on the back side of the structure. The samples were made from n-type silicon wafers with a carrier concentration of 10(13) cm(-3). A Schottky barrier was formed by evaporation of gold in vacuum. An ohmic contact was produced on the opposite side of the wafer by evaporation in vacuum of vanadium silicide and a silver or gold layer over it. The control methods were DLTS and I-V characteristics. The described structure provides a stable ohmic contact with a low reverse current and low noise. The uncontrollable impurity level did not change after barrier and ohmic contact deposition and was equal to similar to 10(10) cm(-3).
机构:
PLESSEY CO LTD,ALLEN CLARK RES CTR,TOWCHESTER NN12 8EQ,NORTHAMPTONSHIR,ENGLANDPLESSEY CO LTD,ALLEN CLARK RES CTR,TOWCHESTER NN12 8EQ,NORTHAMPTONSHIR,ENGLAND
机构:
Korea Adv Inst Sci & Technol, Sch Elect Engn, 291 Daehak Ro, Daejeon 34141, South KoreaKorea Adv Inst Sci & Technol, Sch Elect Engn, 291 Daehak Ro, Daejeon 34141, South Korea
Lee, Jaehyun
Kim, Seungchul
论文数: 0引用数: 0
h-index: 0
机构:
KIST, Computat Sci Res Ctr, 5 Hwarang Ro,14 Gil, Seoul 02792, South KoreaKorea Adv Inst Sci & Technol, Sch Elect Engn, 291 Daehak Ro, Daejeon 34141, South Korea
Kim, Seungchul
Shin, Mincheol
论文数: 0引用数: 0
h-index: 0
机构:
Korea Adv Inst Sci & Technol, Sch Elect Engn, 291 Daehak Ro, Daejeon 34141, South KoreaKorea Adv Inst Sci & Technol, Sch Elect Engn, 291 Daehak Ro, Daejeon 34141, South Korea