PLACEMENT ALGORITHM FOR LOGIC MODULES

被引:0
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作者
UEDA, K [1 ]
机构
[1] NIPPON TELEGRAGH & TEL PUBL CORP,ELECTR COMMUN LAB,INTEGRATED CIRCUIT SECT,3-9-11 MIDORI,MUSASHINO 180,TOKYO,JAPAN
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:206 / 208
页数:3
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