共 50 条
- [1] A Placement Algorithm for Superconducting Logic Circuits Based on Cell Grouping and Super-Cell Placement [J]. PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2018, : 1465 - 1468
- [3] A Novel Logic Detection Algorithm for Logic Circuits [J]. IEEE ACCESS, 2019, 7 : 127895 - 127903
- [5] A PLACEMENT ALGORITHM FOR LOGIC SCHEMATICS [J]. COMPUTER-AIDED DESIGN, 1982, 14 (02) : 108 - 108
- [6] Defect-tolerant Logic with Nanoscale Crossbar Circuits [J]. Journal of Electronic Testing, 2007, 23 : 117 - 129
- [7] Defect-tolerant logic with nanoscale crossbar circuits [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2007, 23 (2-3): : 117 - 129
- [8] AN ALGORITHM FOR THE PARTITIONING OF LOGIC-CIRCUITS [J]. IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1984, 131 (04): : 113 - 118