A low reference spur quadrature phase-locked loop for UWB systems

This paper presents a low phase noise and low reference spur quadrature phase-locked loop (QPLL) circuit that is implemented as a part of a frequency synthesizer for China UWB standard systems. A glitch-suppressed charge pump (CP) is employed for reference spur reduction. By forcing the phase frequency detector and CP to operate in a linear region of its transfer function, the linearity of the QPLL is further improved. With the proposed series-quadrature voltage-controlled oscillator, the phase accuracy of the QPLL is guaranteed. The circuit is fabricated in the TSMC 0.13 mu m CMOS process and operated at 1.2-V supply voltage. The QPLL measures a phase noise of 95 dBc/Hz at 100-kHz offset and a reference spur of 71 dBc. The fully-integrated QPLL dissipates a current of 13 mA.