Fabrication of silicon-on-insulator MEM resonators with deep sub-micron transduction gaps

被引:0
|
作者
Nicoleta Diana Badila Ciressan
Cyrille Hibert
Marco Mazza
Adrian M. Ionescu
机构
[1] Swiss Federal Institute of Technology,Electronics Laboratory
[2] Swiss Federal Institute of Technology,Center of Micro
来源
Microsystem Technologies | 2007年 / 13卷
关键词
Trench; Polysilicon; Chemical Mechanical Polishing; Polysilicon Layer; Hard Mask;
D O I
暂无
中图分类号
学科分类号
摘要
The paper proposes and validates a low-cost technological process for the realization of mono-crystalline micro-electro-mechanical (MEM) resonators with deep sub-micron transduction gaps, on silicon-on-insulator (SOI) substrates. The MEM resonators are designed to work as bulk lateral resonators (BLR) in which the resonance of a suspended mass is excited and detected by lateral electrodes. For MEM BLRs, nano-scaled gaps (<200 nm) are essential to reduce the motional resistance in the order of few kΩ as well as to avoid the use of large DC applied voltages. Only standard optical lithography with 1 μm resolution and IC-compatible processing steps are employed to obtain 100–200 nm wide gaps with very high aspect-ratios of more than [40:1], allowing the fabrication of high Q resonators for MHz to GHz operating frequency range.
引用
收藏
页码:1489 / 1493
页数:4
相关论文
共 50 条
  • [1] Fabrication of silicon-on-insulator MEM resonators with deep sub-micron transduction gaps
    Ciressan, Nicoleta Diana Badila
    Hibert, Cyrille
    Mazza, Marco
    Ionescu, Adrian M.
    [J]. MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2007, 13 (11-12): : 1489 - 1493
  • [2] Fabrication of silicon-on-insulator mem resonators with deep submicron transduction gaps
    Badila, Nicoleta Diana
    Hibert, Cyrille
    Mazza, Marco
    Ionescu, Adrian M.
    [J]. DTIP 2006: SYMPOSIUM ON DESIGN,TEST, INTEGRATION AND PACKAGING OF MEMS/MOEMS 2006, 2006, : 185 - 188
  • [3] Fabrication-robust silicon photonic devices in standard sub-micron silicon-on-insulator processes
    Rizzo, A. N. T. H. O. N. Y.
    Dave, U. T. S. A., V
    Novick, A. S. H. E. R.
    Freitas, A. L. E. X. A. N. D. R. E.
    Roberts, Samantha P.
    James, A. N. E. E. K.
    Lipson, M. I. C. H. A. L.
    Bergman, K. E. R. E. N.
    [J]. OPTICS LETTERS, 2023, 48 (02) : 215 - 218
  • [4] High aspect ratio sub-micron trenches on silicon-on-insulator and bulk silicon
    Hermersdorf, M.
    Hibert, C.
    Grogg, D.
    Ionescu, A. M.
    [J]. MICROELECTRONIC ENGINEERING, 2011, 88 (08) : 2556 - 2558
  • [5] FORMATION OF SUB-MICRON SILICON-ON-INSULATOR STRUCTURES BY LATERAL OXIDATION OF SUBSTRATE-SILICON ISLANDS
    ARNEY, SC
    MACDONALD, NC
    [J]. JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1988, 6 (01): : 341 - 345
  • [6] Fabrication of sub-micron silicon vias by deep reactive ion etching
    Zhang, Shawn X. D.
    Hon, Ronald
    Lee, S. W. Ricky
    [J]. ADVANCES IN ELECTRONIC PACKAGING 2005, PTS A-C, 2005, : 947 - 953
  • [7] Simulations of heat conduction in sub-micron silicon-on-insulator transistors accounting for phonon dispersion and polarization
    Narumanchi, SVJ
    Murthy, JY
    Amon, CH
    [J]. ELECTRONIC AND PHOTONIC PACKAGING, ELECTRICAL SYSTEMS AND PHOTONIC DESIGN AND NANOTECHNOLOGY - 2003, 2003, : 329 - 339
  • [8] Performance evaluation of deep sub-micron, fully-depleted silicon-on-insulator (FD-SOI) transistors at low temperatures
    Yuan, J
    Patel, JU
    Vandooren, A
    [J]. 2000 IEEE AEROSPACE CONFERENCE PROCEEDINGS, VOL 5, 2000, : 415 - 419
  • [9] Analysis and fabrication of sub micron scale directional coupler in high-index silicon-on-insulator
    Dotan, Ido E.
    Goldring, Dan-Tian
    Mendlovic, David
    [J]. 2006 IEEE 24TH CONVENTION OF ELECTRICAL & ELECTRONICS ENGINEERS IN ISRAEL, 2006, : 71 - +
  • [10] Optimization of H2 thermal annealing process for the fabrication of ultra-low loss sub-micron silicon-on-insulator rib waveguides
    Bellegarde, Cyril
    Pargon, Erwine
    Sciancalepore, Corrado
    Petit-Etienne, Camille
    Lemmonier, Olivier
    Ribaud, Karen
    Hartmann, Jean-Michel
    Lyan, Philippe
    [J]. SILICON PHOTONICS XIII, 2018, 10537