Dual-channel trench LDMOS on SOI for RF power amplifier applications

An integrable RF dual-channel trench LDMOS (DCT-LDMOS) structure is proposed on SOI by incorporating trenches in the drift region. The gate electrode of DCT-LDMOS is placed vertically in a trench at the centre of structure thus forming two channels in p-base region which carry drain current in parallel. Other two identical trenches filled with oxide are symmetrically located on both sides of p-base to enhance reduced-surface-field effect in the device. The electric field modulation by the trenches together with dual-channel leads to significant improvement in DC and RF performance of the proposed device. The performance of DCT-LDMOS is evaluated and compared with that of the conventional LDMOS using 2-D simulations. The proposed structure exhibits 1.47 times increase in breakdown voltage, 25 % reduction in on-resistance, 2.4 times higher output current, and 2 times improvement in peak transconductance when compared to the conventional device for identical device area. Furthermore, the DCT-LDMOS achieves 45 % higher cut-off frequency and 14 % improvement in maximum oscillation frequency over the conventional counterpart.