OpenMDSP: Extending OpenMP to Program Multi-Core DSPs

被引:0
|
作者
Jiang-Zhou He
Wen-Guang Chen
Guang-Ri Chen
Wei-Min Zheng
Zhi-Zhong Tang
Han-Dong Ye
机构
[1] Tsinghua University,Department of Computer Science and Technology
[2] Huawei Technologies Co. Ltd.,undefined
关键词
OpenMP; multi-core digital signal processor; data parallelism; Long Term Evolution;
D O I
暂无
中图分类号
学科分类号
摘要
Multi-core digital signal processors (DSPs) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing technologies, among others. In comparison with general-purpose multi-processors, multi-core DSPs normally have a more complex memory hierarchy, such as on-chip core-local memory and non-cache-coherent shared memory. As a result, efficient multi-core DSP applications are very difficult to write. The current approach used to program multi-core DSPs is based on proprietary vendor software development kits (SDKs), which only provide low-level, non-portable primitives. While it is acceptable to write coarse-grained task-level parallel code with these SDKs, writing fine-grained data parallel code with SDKs is a very tedious and error-prone approach. We believe that it is desirable to possess a high-level and portable parallel programming model for multi-core DSPs. In this paper, we propose OpenMDSP, an extension of OpenMP designed for multi-core DSPs. The goal of OpenMDSP is to fill the gap between the OpenMP memory model and the memory hierarchy of multi-core DSPs. We propose three classes of directives in OpenMDSP, including 1) data placement directives that allow programmers to control the placement of global variables conveniently, 2) distributed array directives that divide a whole array into sections and promote the sections into core-local memory to improve performance, and 3) stream access directives that promote big arrays into core-local memory section by section during parallel loop processing while hiding the latency of data movement by the direct memory access (DMA) of a DSP. We implement the compiler and runtime system for OpenMDSP on FreeScale MSC8156. The benchmarking results show that seven of nine benchmarks achieve a speedup of more than a factor of 5 when using six threads.
引用
收藏
页码:316 / 331
页数:15
相关论文
共 50 条
  • [21] Parallel Performance of Numerical Algorithms on Multi-core System Using OpenMP
    Sharma, Sanjay Kumar
    Gupta, Kusum
    [J]. ADVANCES IN COMPUTING AND INFORMATION TECHNOLOGY, VOL 2, 2013, 177 : 279 - 288
  • [22] Performance analysis of a hybrid MPI/OpenMP application on multi-core clusters
    Chorley, Martin J.
    Walker, David W.
    [J]. JOURNAL OF COMPUTATIONAL SCIENCE, 2010, 1 (03) : 168 - 174
  • [23] On the Performance of MPI-OpenMP on a 12 Nodes Multi-core Cluster
    Abdelgadir, Abdelgadir Tageldin
    Pathan, Al-Sakib Khan
    Ahmed, Mohiuddin
    [J]. ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, PT II, 2011, 7017 : 225 - +
  • [24] Code Parallelization for Multi-Core Software Defined Radio Platforms with OpenMP
    Schwall, Michael
    Nagel, Stefan
    Jondral, Friedrich K.
    [J]. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2012, 69 (01): : 67 - 74
  • [25] Improved Parallel Lexical Analysis Using OpenMP on Multi-Core Machines
    Barve, Amit
    Joshi, Brijendra Kumar
    [J]. PROCEEDINGS OF 4TH INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATION AND CONTROL(ICAC3'15), 2015, 49 : 211 - 219
  • [26] Sensor-Based Online Hand Gesture Recognition on Multi-Core DSPs
    Gruetzmacher, Florian
    Wolff, Johann-Peter
    Haubelt, Christian
    [J]. 2015 IEEE GLOBAL CONFERENCE ON SIGNAL AND INFORMATION PROCESSING (GLOBALSIP), 2015, : 898 - 902
  • [27] Implementation and optimization of OpenMP task parallelism on heterogeneous multi-core architecture
    Li, Shigang
    Hu, Changjun
    [J]. Journal of Computational Information Systems, 2013, 9 (12): : 4981 - 4988
  • [28] Compiler parallelization of C programs for multi-core DSPs with multiple address spaces
    Franke, B
    O'Boyle, MFP
    [J]. CODES(PLUS)ISSS 2003: FIRST IEEE/ACM/IFIP INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN & SYSTEM SYNTHESIS, 2003, : 219 - 224
  • [29] A data streams speculation technique for shared-memory Multi-Core DSPs
    Wang, Dong
    Chen, Shuming
    Sun, Shuwei
    [J]. CISP 2008: FIRST INTERNATIONAL CONGRESS ON IMAGE AND SIGNAL PROCESSING, VOL 2, PROCEEDINGS, 2008, : 551 - 555
  • [30] Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory
    Hu, Jingtong
    He, Yi
    Zhuge, Qingfeng
    Sha, Edwin H. -M.
    Xue, Chun Jason
    Zhao, Yingchao
    [J]. JOURNAL OF SYSTEMS ARCHITECTURE, 2013, 59 (07) : 389 - 399