Adaptive Thread Scheduling in Chip Multiprocessors

被引:0
|
作者
Ismail Akturk
Ozcan Ozturk
机构
[1] University of Missouri,Department of Electrical Engineering and Computer Science
[2] Bilkent University,Department of Computer Engineering
关键词
Adaptive scheduling; Chip multiprocessors; Inter-thread contention; Multi-metric scoring;
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中图分类号
学科分类号
摘要
The full potential of chip multiprocessors remains unexploited due to architecture oblivious thread schedulers employed in operating systems. We introduce an adaptive cache-hierarchy-aware scheduler that tries to schedule threads in a way that inter-thread contention is minimized. A novel multi-metric scoring scheme is used which specifies L1 cache access characteristics of threads. Scheduling decisions are made based on these multi-metric scores of threads.
引用
收藏
页码:1014 / 1044
页数:30
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