Analysis of memory effect in amplifier-shared discrete-time sigma-delta modulators

被引:0
|
作者
Je-Kwang Cho
Donghyun Baek
机构
[1] LG Electronics,IP Technology Team, SIC Center
[2] Chung-Ang University,School of Electrical Engineering
关键词
Amplifier sharing; Analog-to-digital converter; Memory effect; Sigma-delta (; ) modulator; Switched-capacitor circuit;
D O I
暂无
中图分类号
学科分类号
摘要
In this paper, an analysis of the memory effect in two amplifier-shared switched-capacitor integrators for a discrete-time sigma-delta (ΣΔ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\varSigma \varDelta$$\end{document}) modulator is presented. Interaction between the integrators is modeled by feeding an integrator output voltage to another integrator input and vice versa and multiplying by a coefficient depending on DC gain and input parasitic capacitance of the opamp. The model is applied to a second-order ΣΔ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\varSigma \varDelta$$\end{document} modulator to analyze how signal and noise transfer functions are altered. The analysis reveals that the magnitude response of the signal transfer function is minimally affected in the low-frequency signal band, whereas that of the noise transfer function can be increased significantly in the signal band, degrading the effectiveness of noise shaping. In relation to the parasitic capacitance at the opamp input, the DC gain required of the opamp is derived quantitatively for a given degradation of modulator dynamic range with respect to different oversampling ratios. Considering leaky integration, which is also caused by the finite opamp DC gain, the DC gain requirement imposed by the memory effect is proved to be more severe than that by leaky integration. Macromodel-based circuit simulation results confirm the accuracy of the proposed model and equations.
引用
收藏
页码:55 / 63
页数:8
相关论文
共 50 条
  • [1] Analysis of memory effect in amplifier-shared discrete-time sigma-delta modulators
    Cho, Je-Kwang
    Baek, Donghyun
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2017, 90 (01) : 55 - 63
  • [2] Macro Model for Discrete-Time Sigma-Delta Modulators
    Lee, Kye-Shin
    [J]. ELECTRONICS, 2022, 11 (23)
  • [3] A method for the discrete-time simulation of continuous-time Sigma-Delta modulators
    Keller, Matthias
    Buhmann, Alexander
    Ortmanns, Maurits
    Manoli, Yiannos
    [J]. 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 241 - 244
  • [4] Systematic approach for scaling coefficients of discrete-time and continuous-time sigma-delta modulators
    Beilleau, N
    Aboushady, H
    Louërat, MM
    [J]. Proceedings of the 46th IEEE International Midwest Symposium on Circuits & Systems, Vols 1-3, 2003, : 233 - 236
  • [5] Automated synthesis of discrete-time sigma-delta modulators from system architecture to circuit netlist
    Lee, Shuenn-Yuh
    Chen, Chih-Yuan
    Hong, Jia-Hua
    Chang, Rong-Guey
    Lin, Mark Po-Hung
    [J]. MICROELECTRONICS JOURNAL, 2011, 42 (02) : 347 - 357
  • [6] Discrete-Time Modelling of Sigma-Delta Inspired Systems for MEMS
    Blokhina, E.
    Giounanlis, P.
    Dominguez-Pumar, M.
    Gorreta, S.
    Pons-Nin, J.
    Feely, O.
    [J]. NONLINEAR MAPS AND THEIR APPLICATIONS, 2015, : 37 - 67
  • [7] Discrete-Time Simulation of Arbitrary Digital/Analog Converter Waveforms in Continuous-Time Sigma-Delta Modulators
    Brueckner, Timon
    Kiebler, Martin
    Zorn, Christoph
    Mathis, Wolfgang
    Ortmanns, Maurits
    [J]. 2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2012, : 432 - 435
  • [8] Behavioral Modeling of Discrete Domain Sigma-Delta Modulators
    Luo, Miaoyi
    Ling, Chaodong
    [J]. 2008 2ND INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY AND IDENTIFICATION, 2008, : 387 - 390
  • [9] A design-oriented approach for modeling integrators non-idealities in discrete-time sigma-delta modulators
    Baltolu, A.
    Begueret, J. B.
    Dallet, D.
    Chalet, F.
    [J]. 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 906 - 909
  • [10] A comprehensive analysis of the effect of finite amplifier bandwidth and excess loop delay in continuous-time sigma-delta modulators
    Quintanilla, L.
    Arias, J.
    Segundo, J.
    Enriquez, L.
    Hernandez-Mangas, J. M.
    Vicente, J.
    [J]. MICROELECTRONICS JOURNAL, 2009, 40 (12) : 1736 - 1745