Simulation of Hardware Accelerator for Wireless Body Sensor Network

This paper presents the synthesis results of a Hardware accelerator built for Wireless Body Sensor Network (WBSN). The WBSN is getting wide popularity because of the living environment of a human being. Nowadays the chronic diseases are increasing due to unhealthy living styles. The introduction of WBSN was in military application, where the health condition of the army personnel was known by themselves. WBSN will help in finding any discrepancy in health conditions during the war so that precautionary measures can be taken and hence started to grow this area of research in diversified applications. This led to the huge development in the field of Biomedical Applications. The paper concentrates on building a hardware accelerator for the WBSN. The Hardware accelerator is designed to process four health parameters that are Blood Pressure (BP), Electrocardiogram (ECG), Temperature, and Electroencephalogram (EEG). The implementation of the accelerator is simulated and synthesized on an FPGA Vertex-7 family kit. The proposed design consumes less power and also increases the speed of processing.