A technique to improve the linearization of frequency–voltage characteristic of LC-VCO

被引:0
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作者
Debashis Mandal
T. K. Bhattacharyya
机构
[1] Indian Institute of Technology,Department of Electronics and Electrical Communication Engineering
[2] Kharagpur,undefined
关键词
VCO; MOS varactor; Frequency-voltage characteristic; Linearization;
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学科分类号
摘要
This paper presents a very low-power linearization technique to improve the linearity of frequency-voltage characteristic of LC-VCO (voltage controlled oscillator) using MOS varactor. This reduces the VCO gain (KVCO) variation and its required value over the tuning voltage range. Low KVCO improves noise and reference spur performances at the output of phase lock loop/frequency synthesizer (FS). Low KVCO variation reduces FS loop stability problem. Using this VCO circuit, a fully on-chip integer-N frequency synthesizer has been fabricated in 0.18 μm epi-digital CMOS technology for 2.45 GHz ZigBee application. The measured VCO phase noise is −115.76 and −125.23 dBc/Hz at 1 and 3 MHz offset frequencies, respectively from 2.445 GHz carrier and the reference spur of the frequency synthesizer is −68.62 dBc. The used supply voltage is 1.5 V.
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页码:253 / 257
页数:4
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