共 50 条
- [1] Efficient Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist - Skein [J]. FRONTIERS IN COMPUTER EDUCATION, 2012, 133 : 933 - 940
- [2] Efficient FPGA Implementation of Secure Hash Algorithm Grostl - SHA-3 Finalist [J]. EMERGING TRENDS AND APPLICATIONS IN INFORMATION COMMUNICATION TECHNOLOGIES, 2012, 281 : 361 - +
- [4] Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for IoT Applications [J]. INTERNATIONAL JOURNAL ON SMART SENSING AND INTELLIGENT SYSTEMS, 2014, 7 (05): : 1 - 6
- [5] High Throughput Design and Implementation of SHA-3 Hash Algorithm [J]. 2017 INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2017,
- [7] High Performance Pipelined FPGA Implementation of the SHA-3 Hash Algorithm [J]. 2015 4TH MEDITERRANEAN CONFERENCE ON EMBEDDED COMPUTING (MECO), 2015, : 68 - 71
- [8] Secure Neural Circuits to Mitigate Correlation Power Analysis on SHA-3 Hash Function [J]. 2018 31ST INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2018 17TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID & ES), 2018, : 161 - 166
- [9] An FPGA implementation of the SHA-3: The BLAKE Hash Function [J]. 2013 10TH INTERNATIONAL MULTI-CONFERENCE ON SYSTEMS, SIGNALS & DEVICES (SSD), 2013,