Distributed Diagnosis of Interconnections in SoC and MCM Designs

被引：0
|
作者：
Rajesh Pendurkar
Abhijit Chatterjee
Yervant Zorian
机构：
[1] Sun Microsystems,School of Electrical and Computer Engineering
[2] Georgia Institute of Technology,undefined
来源：
Journal of Electronic Testing | 2004年 / 20卷
关键词：
interconnect test and diagnosis; performance fault diagnosis; design for testability for SOCs and MCMs; MISR reconfiguration;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
An interconnect test and diagnostic scheme based on distributed BIST resources in SOC and MCM designs is described. Test and diagnosis is enabled by embedding cascaded test pattern generators and reconfigurable signature analyzers into the design. The theory of partitioning of linear registers is applied to devise a two phase distributed diagnosis strategy. The design of a novel MISR reconfiguration scheme that enables high diagnosis resolution is presented.
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页码：291 / 307
页数：16
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