A New Technique to Improve Breakdown Voltage of SOI LDMOSs: Multiple Diode Wells

In this paper, we propose a new technique in silicon-on-insulator (SOI) lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect transistor in order to obtain a high breakdown voltage. The structure is characterized by multiple N and P doped wells (diode wells) in the buried oxide. Therefore, we call the structure multiple diode wells SOI LDMOS (MDW-LDMOS). The key idea in this work is to amend the electric field of the buried oxide layer and modulate the electric field in the drift region, both of them leading to a high breakdown voltage. Based on the electric displacement continuity, the charge densities in the wells effectively amend the electric field of the buried oxide layer and reduce the electric field of the silicon layer. Also, the diode wells make the uniform distribution of the electric field by producing multiple additional peaks. Using two-dimensional numerical simulation, we demonstrate that the breakdown voltage of the proposed structure improves about 260% in comparison with a conventional LDMOS (C-LDMOS) structure.