A novel clock-glitch-attack-proof image encryption algorithm implemented on FPGA

Nowadays, chaotic systems are widely used in engineering applications. They play a vital role, particularly in cryptography and secure communication systems. This paper proposed an image encryption scheme based on the chaotic oscillator and highlights the risk of using non-autonomous chaotic oscillators as a source of entropy to construct the encryption key. In this study, we propose a symmetric image encryption scheme consisting of two main phases: position permutation and value transformation using XOR bitwise operation. The encryption key is utilized twice, once in the position permutation phase and then again in the value transformation phase. Our analysis of the proposed algorithm reveals that the majority of the computational time required for image encryption is attributed to the position permutation phase. To determine the appropriate number of iterations needed for each image size, we examine the three factors of correlation between adjacent pixels, entropy, and computational time, specifically focusing on the shuffling step. This analysis leads to significant improvements in our initial computational time, reducing it by up to ten times. To evaluate the encryption scheme, we employ two types of chaotic oscillators, autonomous and non-autonomous, across six different image sizes. We consider various metrics such as computational time, correlation between adjacent pixels, and entropy of the ciphered image. Additionally, we implement the non-autonomous chaotic oscillator on an FPGA to assess its vulnerability to a clock glitch attack, which affects the system’s randomness. Based on our experimental results, we observe that both oscillators can effectively serve as a source of entropy for cryptographic applications.