Design of low power single-stage bias current control technique- based DVGA for LTE receivers

In this study, a novel single-stage Digital Variable Gain Amplifier architecture (DVGA) was presented for Long Time Evolution (LTE) receivers. The proposed DVGA combines two transimpedance amplifiers, a transconductance amplifier and a novel digitally controlled current. Using a digital control block, an auxiliary pair to retain a constant current density enabled changing the gain. The Heuristic Method was used to optimize the proposed circuit performance for a high gain, low noise and low power consumption. This circuit was simulated using device-level description of TSMC 0.18 µm CMOS process. The VGA achieved 59 dB gain control range, 171 MHz bandwidth, 11.5 dBm third-order input-intercept point as a minimum gain and below 19 dB noise figure as a maximum gain which makes it convenient for LTE receivers. For maximum gain, The Total Harmonic Distortion (THD) is less than -62 dB. The fully differential VGA has a low THD which it represents a key performance satisfying the LTE system application requirements. The overall power consumption of the circuit is 0.35 mW for ± 0.9 V power supply. This paper also dealt with the prediction of optimized DVGA performances for the upcoming CMOS nanoprocess using the robust Bisquare Weights (BW) method for 16 to 10 nm process nodes. The behavior of the optimized DVGA performances with process scaling was detailed.